The present invention relates to a method of manufacturing a semiconductor device and, more particularly, to a method of integrating both bipolar and CMOS transistors on the same substrate.
The present trend towards miniaturization and increased operating speeds of electronic products, has necessitated the development of multi-functional semiconductor devices having both bipolar and CMOS transistors fabricated on a single semiconductor chip. This technology is commonly referred to as BiCMOS.
BiCMOS devices generally have a lightly doped drain (LDD) structure in order to prevent an undesirable drop in the breakdown voltage thereof due to injection of hot electrons generated by the NMOS transistors thereof. The LDD structure is generally obtained by the below-described process.
More particularly, after the gate electrodes of the PMOS and NMOS transistors are formed, an oxide layer of 2000-3000 .ANG. is formed by means of a chemical vapor deposition (CVD) technique, and then removed by means of a dry etching technique, such as reactive ion etching (RIE), until the surface of the semiconductor substrate is exposed, to thereby form spacers adjacent to the sidewalls of the gate electrodes. The regions beneath the spacers are protected from subsequent ion implantation which is carried out to form the drain regions. The regions beneath the spacers are lightly doped by diffusion, thereby increasing the breakdown voltages at the edge of the drain junctions.
The above-described process for forming LDD structures in BiCMOS devices suffers from the following drawbacks and shortcomings. More particularly, the step of dry etching to remove the oxide layer for forming the spacers produces damages such as dislocation on the surface of the substrate. Further, the degree of oxide removal is variable and non-uniform across the surface of the wafer in which the BiCMOS devices are formed, due to the inherent uniformity limitations of the dry etching equipment. These problems with dry etching render the base-emitter junctions in BiCMOS devices unstable, thereby degrading the reliability thereof, and further, causing non-linearity of the DC forward current gain Hfe of the bipolar transistors thereof.
As is evident from the foregoing, there presently exists a need for a method of manufacturing a BiCMOS device which overcomes the above-described drawbacks and shortcomings of the presently available BiCMOS manufacturing technology. The present invention fulfills this need.